I am a PhD student at the University of Toronto, working with Professor Jason Anderson. My research centers on the architecture of Coarse-Grained Reconfigurable Arrays (CGRAs) — a class of reconfigurable architectures capable of delivering near-ASIC performance and energy efficiency while retaining runtime programmability. I work on designing and exploring CGRA architectures, and also develop CAD mapping algorithms to efficiently execute applications on these devices. I also completed a research internship at RIKEN Center for Computational Science (R-CCS) with Dr. Kentaro Sano.

Before starting my PhD, I worked as a Silicon Design Engineer at AMD in India. During my undergraduate studies in Electronics, I interned with Prof. Paolo Ienne at EPFL on the Dynamatic project, with Prof. Kamakoti at IIT Madras on the Shakti processor project, and participated in Google Summer of Code with BeagleBoard.org for the BeagleWire project.

I am always open to research collaborations and opportunities in Computer Architecture, Reconfigurable Computing, and RTL Design & Verification. Feel free to reach out if you'd like to discuss ideas or any of my previous work.
CGRA Architecture Reconfigurable Computing CAD Algorithms Computer Architecture RTL Design & Verification HLS

selected publications

  1. CGRA
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    Predication in Elastic CGRAs
    Omkar Bhilare , Omar Ragheb , Boma Adhi, and 3 more authors
    In Workshop on CGRAs for High Performance Computing (CGRA4HPCA) at IPDPS , 2026
  2. Hardware-Software
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    CAD Techniques for NoC-Connected Multi-CGRA Systems
    Haron Wei ,  Omkar Bhilare , Hamas Waqar, and 1 more author
    In Highly Efficient Accelerators and Reconfigurable Technologies (HEART) , 2024
  3. Hardware-Software
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    DEEPFAKE CLI: Accelerated Deepfake Detection Using FPGAs
    Omkar Bhilare , Rahul Singh , Vedant Paranjape, and 3 more authors
    In Parallel and Distributed Computing, Applications and Technologies , 2023